In connection with the conversion of an analog signal of a relatively small magnitude to digital form, it is common practice to amplify the signal before conversion. In certain contexts, where the signal must be digitized to a high degree of resolution over a relatively large dynamic range of amplitudes, this amplification is performed using an automatic gain ranging or floating-point amplifier (hereinafter "FPA"), so that the analog input signal can be more accurately resolved with an analog-to-digital converter (hereinafter "ADC") of relatively limited dynamic range by varying the gain setting of the amplifier as a function of the amplitude of the input signal. For example, in CT scan systems comprising X-ray detectors, a high resolution is needed for relatively low level signals provided by the detectors. Hence, the circuit using the ADC to digitally convert the output of the FPA (hereinafter "FPA/ADC circuit") provides digital conversion of analog signals with a relatively higher resolution over a wider dynamic range of amplitudes than the range otherwise permitted by the ADC alone. One type of FPA/ADC, the 10-22126 FPA Module (in conjunction with the 10-22128 data acquisition board) manufactured and sold by the present assignee the Analogic Corporation, includes a plurality of possible fixed gain settings and a decision circuit for selecting the gain level based on the magnitude of the input signal so as to achieve the maximum amplification possible without over ranging the ADC subsequently used to digitize the signal. The signal is converted to a digital signal representing the "mantissa", while the gain setting can be represented in digital form as the "exponent".
Due to temperature variations, circuit parameters, and other factors, however, the output of these FPA/ADC circuits may drift with time, independently of the input signals, creating offset errors. In order for the FPA/ADC to maintain high linearity over its entire input range, the offsets must be matched very closely or cancelled for all of the gain settings. To compensate for such variations, autozeroing circuits (typically comprising a capacitor for storing the analog offset correction signal) have been developed which automatically apply a separate compensation offset voltage for each gain setting of the FPA to compensate for drift errors. The magnitude of each offset voltage is selected so as to cancel each of the drift errors which otherwise would appear in the output of the amplifier at each gain setting when the input to the amplifier is zero.
The analog, capacitive-type, autozero circuit heretofore used in the FPA/ADC circuit suffers from a number of drawbacks. First, a separate capacitor is required for each gain setting by virtue of the fact that different portions of the FPA are utilized for each gain setting. As a consequence of the use of a plurality of separate autozero circuits, cumulative error may develop under certain circumstances. The need to provide a separate autozeroing circuit for each gain setting in the FPA/ADC circuit typically adds to the cost and complexity of manufacture of a FPA/ADC circuit.
A second disadvantage of the analog autozero circuit is that because autozeroing is accomplished in the analog domain, the autozero correction signal itself may drift. If autozero correction is effected with greater frequency so as to minimize the affects of such drift, then circuit performance may be adversely affected since less time is available to digitize the analog information signals provided at the input of the FPA/ADC circuit.
A third drawback of the analog autozero circuit is that the latter involves a circuit design which is essentially limited to FET-input operational amplifiers.
Another type of analog autozero circuit which is known is described in U.S. Pat. No. 4,163,947 issued Aug. 7, 1979 to Hans J. Weedon and assigned to the present assignee. However, this circuit is inappropriate to provide autozero signals for the FPA/ADC circuit.